Gate circuits in the algebra of transients
RAIRO - Theoretical Informatics and Applications - Informatique Théorique et Applications, Volume 39 (2005) no. 1, p. 67-91

We study simulation of gate circuits in the infinite algebra of transients recently introduced by Brzozowski and Ésik. A transient is a word consisting of alternating 0s and 1s; it represents a changing signal. In the algebra of transients, gates process transients instead of 0s and 1s. Simulation in this algebra is capable of counting signal changes and detecting hazards. We study two simulation algorithms: a general one that works with any initial state, and a special one that applies only if the initial state is stable. We show that the two algorithms agree in the stable case. We also show that the general algorithm is insensitive to the removal of state variables that are not feedback variables. We prove the sufficiency of simulation: all signal changes occurring in binary analysis are predicted by the general algorithm. Finally, we show that simulation can be more pessimistic than binary analysis, if wire delays are not taken into account. We propose a circuit model that we conjecture to be sufficient for proving the equivalence of simulation and binary analysis for feedback-free circuits.

DOI : https://doi.org/10.1051/ita:2005004
Classification:  06A06,  94C10,  94C12
Keywords: algebra, digital circuit, hazard detection, signal changes, simulation, transient
@article{ITA_2005__39_1_67_0,
     author = {Brzozowski, Janusz and Gheorghiu, Mihaela},
     title = {Gate circuits in the algebra of transients},
     journal = {RAIRO - Theoretical Informatics and Applications - Informatique Th\'eorique et Applications},
     publisher = {EDP-Sciences},
     volume = {39},
     number = {1},
     year = {2005},
     pages = {67-91},
     doi = {10.1051/ita:2005004},
     zbl = {1075.94034},
     mrnumber = {2132579},
     language = {en},
     url = {http://www.numdam.org/item/ITA_2005__39_1_67_0}
}
Brzozowski, Janusz; Gheorghiu, Mihaela. Gate circuits in the algebra of transients. RAIRO - Theoretical Informatics and Applications - Informatique Théorique et Applications, Volume 39 (2005) no. 1, pp. 67-91. doi : 10.1051/ita:2005004. http://www.numdam.org/item/ITA_2005__39_1_67_0/

[1] Ann. Symp. Asynchronous Circuits and Systems, Proc. 9th (ASYNC '03), IEEE Comp. Soc. (2003).

[2] J.A. Brzozowski and Z. Ésik, Hazard algebras. Formal Methods in System Design 23 (2003) 223-256. | Zbl 1073.68883

[3] J.A. Brzozowski, Z. Ésik and Y. Iland, Algebras for hazard detection. Beyond Two: Theory and Applications of Multiple-Valued Logic, edited by M. Fitting and E. Orłowska. Physica-Verlag (2003) 3-24. | MR 1987640 | Zbl 1046.94021

[4] J.A. Brzozowski and M. Gheorghiu, Simulation of gate circuits in the algebra of transients. Implementation and Application of Automata. Lect. Notes Comput. Sci. 2608 (2003) 57-66. | MR 2047720 | Zbl 1033.94568

[5] J.A. Brzozowski and C.-J.H. Seger, Asynchronous circuits. Springer-Verlag (1995).

[6] J.A. Brzozowski and C.-J.H. Seger, A characterization of ternary simulation of gate networks. IEEE Trans. Comp. C-36 (1987) 1318-1327. | Zbl 0641.94030

[7] J.A. Brzozowski and M. Yoeli, On a ternary model of gate networks. IEEE Trans. Comp. C-28 (1979) 178-183. | MR 523428 | Zbl 0408.94023

[8] E.B. Eichelberger, Hazard detection in combinational and sequential circuits. IBM J. Res. Dev. 9 (1965) 90-99. | Zbl 0132.37106

[9] J.D. Garside, AMULET3 revealed, in Proc. 5th Ann. Symp. Asynchronous Circuits and Systems (ASYNC '99), IEEE Comp. Soc. (1999) 51-59.

[10] M. Gheorghiu, Circuit simulation using a hazard algebra. MMath Thesis, Department of Computer Science, University of Waterloo, Waterloo, ON, Canada (2001).

[11] M. Gheorghiu and J.A. Brzozowski, Simulation of feedback-free circuits in the algebra of transients. Int. J. Found. Comput. Sci. 14 (2003) 1033-1054. | Zbl 1101.68652

[12] J. Kessels and P. Marston, Designing asynchronous standby circuits for a low-power pager, in Proc. 3rd Ann. Symp. Asynchronous Circuits and Systems (ASYNC '97), IEEE Comp. Soc. (1997) 268-278.

[13] E.J. Mccluskey, Transients in combinational logic circuits. Redundancy techniques for computing systems, edited by R.H. Wilcox and W.C. Mann. Spartan Books (1962) 9-46.

[14] D.E. Muller and W.C. Bartky, A theory of asynchronous circuits, in Proc. Int. Symp. on Theory of Switching, Annals of Comp. Lab. Harvard University 29 (1959) 204-243. | Zbl 0171.37902

[15] C.-J.H. Seger and J.A. Brzozowski, Generalized ternary simulation of sequential circuits. Theor. Inf. Appl. 28 (1994) 159-186. | Numdam | Zbl 0879.94040

[16] I.E. Sutherland and J. Ebergen, Computers without Clocks. Sci. Amer. 287 (2002) 62-69.

[17] S.H. Unger, Asynchronous sequential switching circuits. John Wiley & Sons (1969).